Next Leap in Microprocessor Architecture: Intel® Core™ Duo Processor

Based on dual-core technology, Intel® Core™ Duo rewrites the rules of computing and
delivers breakthrough performance with amazingly low power consumption.† Intel Core Duo processor is at the heart of Intel’s premium desktop and notebook platforms: Intel® Viiv™ Technology and Intel® Centrino® Duo mobile technology, respectively.

More Efficient Use of Power

Demand for greater power efficiency in compute platforms is on the rise across all client segments and form factors. Intel Core Duo processor balances great dual-core computing capabilities with power savings that enable improved battery life in notebooks. Its enhanced voltage efficiency supports cooler and quieter system designs as compared to traditional desktop-type PCs. Traditional mobile and desktop processors limit system design options. Users find they must compromise in areas such as cooling fan noise, battery life, performance and capabilities. With Intel Core Duo, the world’s most innovative PC manufacturers can drive a new generation in computer product designs and meet end consumer needs more effectively.

Specialized Dual-Core Microarchitecture

The Intel Core Duo processor includes two mobileoptimized execution cores in a single processor. This design enables execution of parallel threads or applications on separate cores with dedicated CPU resources. The results are outstanding performance and greater system response when running multiple demanding applications simultaneously. Performance on multi-threaded applications is also enhanced.† The Intel Core Duo processor features a highperformance core architecture that uses micro-op fusion and Advanced Stack Management techniques to maximize performance while optimizing energy efficiencies at the same time. Micro-op fusion combines micro-ops derived from the same macro-op. Advanced Stack Management reduces the number of micro-ops in stack-related operations by tracking relative stack pointer changes locally. Reducing the number of micro-ops results in more efficient scheduling and “on-demand”performance at lower power.

Innovative Features

Intel® Smart Cache

The Intel Core Duo processor features a shared 2MB Level-2 cache with Advanced Transfer Cache Architecture. A system bus between the two execution cores delivers a smarter and more efficient cache and bus design, enabling enhanced dual-core performance and power savings. Intel Smart Cache gives the active execution core access to the full 2MB cache when the other execution core is idle. Dynamic cache allocation across both cores enhances performance and reduces cache under-utilization and misses.

Efficient data sharing between both cores minimizes front side bus traffic and reduces cache coherency complexity. The enhanced Data Pre-fetch Logic in the processor can fetch data to the L2 cache before cache requests occur, reducing bus cycle penalties. The Intel Core Duo processor includes the Data Cache

Unit Streamer, which enhances the performance of the L2 pre-fetcher by requesting L1 warm-ups earlier. The Writer Order Buffer depth is enhanced to help with the write-back latency performance, and the centralized Intel Smart Cache control logic enables power optimization and power savings.

Power-Optimized 667 MHz System Bus A split-transaction, deferred reply protocol is used by the system bus in the Intel Core Duo processor. The Front Side Bus (FSB) uses Source-Synchronous Transfer (SST) of

address and data to improve performance by transferring data at four times per bus clock (4X data transfer rate, or AGP 4X). It is also referred to as “quad-pumped.” The address bus can deliver addresses two times per bus clock which is referred to as a “double-clocked” or 2X address bus. Working together, the 4X data bus and the 2X address bus provide a data bus bandwidth of up to 5.33 GB/second. The FSB uses Advanced Gunning Transceiver Logic (AGTL+) signaling technology, a variant of GTL+ signaling technologywith low power enhancements. Enhanced Intel SpeedStep® Technology Support The Intel Core Duo processor features Enhanced Intel Speed-Step® Technology support at multiple voltage and frequency operating points.

Highlights of this technology include:

• Multiple performance modes ranging from the Lowest Frequency Mode (LFM) to Highest Frequency Mode (HFM) enable optimum performance at the lowest power.

• Real-time dynamic switching of the voltage and frequency between multiple performance modes, based on CPU demand. This occurs by switching the bus ratios, core operating voltage, and core processor speeds without resetting the PC.

• Software control of voltage and frequency operating points.

• Very low transition latency.

• 32KB Level 1 Instruction and Data Caches. Both Instruction and Data Caches on the Intel Core Duo processor are 32KB in size. Large L1 caches provide fast access to critical instructions and data, resulting in very high performance.

Advanced Branch Prediction

The Intel Core Duo processor features an advanced branch prediction architecture that combines three types of predictors—Global, Bi-Modal and Loop Detector. The processor automatically selects the most optimal algorithm to use, significantly reducing the number of mispredicted branches. Execute Disable Bit The Execute Disable Bit feature, combined with a supporting operating system, allows memory to be marked as executable or non executable. If code attempts to run in non executable memory the processor raises an error to the operating system. This feature can prevent some classes of viruses or worms that exploit buffer overrun vulnerabilities and can thus help improve the overall security of the system. Micro FCPGA and FCBGA Packaging Technology The Intel Core Duo processor utilizes socket Micro Flip-Chip Pin Grid Array (Micro-FCPGA) and surface mount Micro Flip-Chip Ball Grid Array (Micro-FCBGA) package technology. These packages are optimized for a range of thinner, lighter designs, including those that are less than one inch thick and deliver outstanding performance. The Micro-FCPGA package plugs into a 479-hole, surface-mount, Zero Insertion Force (ZIF) socket, referred to as the mPGA479M socket.